1. Field of Invention
The present invention relates to non-volatile memory devices, and methods for making such devices.
2. Description of the Related Art
Non-volatile memory devices are currently in widespread use in electronic components that require the retention of information when electrical power is terminated. Non-volatile memory devices include read-only-memory (ROM), programmable-read-only memory (PROM), erasable-programmable-read-only memory (EPROM), and electrically-erasable-programmable-read-only-memory (EEPROM) devices. EEPROM devices differ from other non-volatile memory devices in that they can be electrically programmed and erased. Flash EEPROM devices are similar to EEPROM devices in that memory cells can be programmed and erased electrically. However, flash EEPROM devices enable the erasing of all memory cells or a sector of cells in the device at once.
As with many types of semiconductor devices, requirements for increases in device density to increase speed of operation for integrated circuit devices and/or to reduce their cost, have led to a desire for decreased size of individual components of non-volatile memory devices, such as cells of memory devices.
According to an aspect of the invention, a non-volatile memory device includes a semiconductor substrate, wherein the substrate has a pair of trenches therein, and wherein the substrate has a source and a drain therein; a tunnel oxide on a top substrate surface of the substrate; a pair of insulators; a pair of floating gates over the tunnel oxide and between the insulators, wherein the floating gates are each operatively coupled to the source and the drain, and wherein the floating gates have a gap therebetween; an interpoly dielectric over the floating gate, wherein the interpoly dielectric is in contact with the floating gate; and a control gate over the interpoly dielectric, wherein the control gate is in contact with the interpoly dielectric. A channel gate portion of the control gate is located in the gap between the floating gates.
According to another aspect of the invention, a non-volatile memory device includes a semiconductor substrate, wherein the substrate has a pair of trenches therein, and wherein the substrate has a source and a drain therein; a tunnel oxide on a top substrate surface of the substrate; a pair of insulators; a pair of floating gates over the tunnel oxide and between the insulators, wherein the floating gates are each operatively coupled to the source and the drain, and wherein the floating gates have a gap therebetween; an interpoly dielectric over the floating gate, wherein the interpoly dielectric is in contact with the floating gate; and a control gate over the interpoly dielectric, wherein the control gate is in contact with the interpoly dielectric. A channel gate portion of the control gate is located in the gap between the floating gates. The insulators have respective lower trench-fill portions in respective of the trenches, wherein the insulators have respective upper protruding portions protruding from the top substrate surface. The upper protruding portions have respective top insulator surfaces. The floating gates are in contact with respective of the upper protruding portions of the insulators. The control gate is configured such that a channel in the substrate, underneath the channel gate portion of the control gate, becomes conductive when 1) there is no charge stored on the floating gates, and 2) a sufficiently high threshold voltage is provided on the control gate. The floating gates are configured such that, when a sufficient charge is stored on the floating gates, the threshold voltage is increased to an increased threshold voltage.
According to a further aspect of the invention, a method of making a non-volatile memory device includes: forming a pair of insulators on a substrate, the insulators each having an upper protruding portion that protrudes from a top substrate surface of the substrate; forming a pair of floating gates between the upper protruding portions, wherein the floating gates are in contact with respective of the upper protruding portions, and wherein the floating gates have a gap therebetween; forming an interpoly dielectric on the floating gates and the upper protruding portions; and forming a control gate on the interpoly dielectric, wherein a channel gate portion is in the gap between the floating gates.
To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.